Belkin F5U231 Specifications

High Speed System Compliance Test Procedure Revision 1.0 1Universal Serial Bus Implementers Forum High-Speed System/Motherboard Compliance Test Proc

High Speed System Compliance Test Procedure Revision 1.0 10• USB Electrical Test Analysis Scripts for Matlab 6 – For performing electrical signal q

High Speed System Compliance Test Procedure Revision 1.0 115.3 Port Documentation In most cases where there is only one USB host controller, identi

High Speed System Compliance Test Procedure Revision 1.0 125.4 Host High-speed Signal Quality 1. Turn on the oscilloscope if not have already done

High Speed System Compliance Test Procedure Revision 1.0 13Caution: Do not shut down the Remote Desktop Connection on the remote host without first

High Speed System Compliance Test Procedure Revision 1.0 14TEST_PACKET 12. Using the oscilloscope, verify test packets are being transmitted from t

High Speed System Compliance Test Procedure Revision 1.0 15GPIB-DAQ 16. Enter a descriptive file name (e.g. TIDxxxxxxx port 1 HSNE.tsv) and save t

High Speed System Compliance Test Procedure Revision 1.0 16 HTML Report for High Speed Signal Quality Test 19. Record the test result in Appendix

High Speed System Compliance Test Procedure Revision 1.0 175.5 Full-speed Signal Quality 1. Please ensure the requirements for oscilloscope signal

High Speed System Compliance Test Procedure Revision 1.0 18SQiDD Test Fixture 5. A Belkin High-speed hub is used as a known good full speed device

High Speed System Compliance Test Procedure Revision 1.0 199. Connect the upstream port of the hub to J3 of the SQIDD fixture. Apply power to the h

Revision History Rev Date Filename Comments 0.91 Mar-15-2002 HS System Test.DOC Preliminary review release 0.95 Jul-19-2002 HS Sys

High Speed System Compliance Test Procedure Revision 1.0 20Downstream Full-Speed SOF Packet Captured 13. Using the GPIB DAQ graphical user interfac

High Speed System Compliance Test Procedure Revision 1.0 2116. Verify the Signal Eye, EOP Width, and Signaling Rate all pass. The results displaye

High Speed System Compliance Test Procedure Revision 1.0 2218. Detach the A-plug of the 5-Meter cable from the port. 19. Repeat steps 10 through

High Speed System Compliance Test Procedure Revision 1.0 235.6 Low-speed Signal Quality 1. Recall the LS_DS2&3.SET oscilloscope setup. 2. A

High Speed System Compliance Test Procedure Revision 1.0 24Downstream Low-Speed SOF Packet Captured 7. Using the GPIB DAQ graphical user interface

High Speed System Compliance Test Procedure Revision 1.0 2510. Verify the Signal Eye, EOP Width, and Signaling Rate all pass. The results displayed

High Speed System Compliance Test Procedure Revision 1.0 2614. Save all files created during the tests. Detach the A-plug of the SQIDD test fixture

High Speed System Compliance Test Procedure Revision 1.0 275.7 Droop 1. Two additional test fixtures are required to perform the droop test: 1) D

High Speed System Compliance Test Procedure Revision 1.0 285. Connect the Channel 2 FET probe to Vbus and GND probe points at section 2 of the SQID

High Speed System Compliance Test Procedure Revision 1.0 298. Measure the droop amplitude on Channel 2 with the horizontal cursors. Verify it is le

High Speed System Compliance Test Procedure Revision 1.0 3DISCLAIMER OF WARRANTIES THIS SPECIFICATION IS PROVIDED “AS IS” AND WITH NO WARRANTIES OF

High Speed System Compliance Test Procedure Revision 1.0 305.8 Drop 1. The drop measurement is the DC voltage difference of the Vbus of a port bet

High Speed System Compliance Test Procedure Revision 1.0 315. Repeat step 3 through 4 for all ports. 6. Detach the fixtures from all ports. 7.

High Speed System Compliance Test Procedure Revision 1.0 325.9 Interoperability Interoperability uses the USB-IF gold tree devices as described in

High Speed System Compliance Test Procedure Revision 1.0 33The gold tree consists of a high-speed tree and a full-speed tree. Each tree is connecte

High Speed System Compliance Test Procedure Revision 1.0 342. Perform the Functionality Procedure as described in section 5.9.1 3. Perform a Windo

High Speed System Compliance Test Procedure Revision 1.0 355.9.4 S3 Interoperability 1. Please set up the system standby mode to enter S3 (this is

High Speed System Compliance Test Procedure Revision 1.0 365.9.5 S4 Interoperability 1. Select Hibernate from Windows Start → Shut Down → ‘H’ key

High Speed System Compliance Test Procedure Revision 1.0 37Appendix A – High-speed System/Motherboard Compliance Test Data This section is for reco

High Speed System Compliance Test Procedure Revision 1.0 38USB Silicon Stepping A3 Port Documentation Logical Port P1 P2 P3 P4 P5 P6

High Speed System Compliance Test Procedure Revision 1.0 39A5 Full-speed Signal Quality Port P1 P2 P3 P4 P5 P6 Signal Eye EOP W

High Speed System Compliance Test Procedure Revision 1.0 4Table of Contents 1 Introduction...

High Speed System Compliance Test Procedure Revision 1.0 40Overall Result:  Pass  Fail  N/A Comments: A7 Droop Port P1 P2 P3 P4

High Speed System Compliance Test Procedure Revision 1.0 41A9.1 S0 Interoperability Back Panel Split Front /Back Panel Front Panel Port ID

High Speed System Compliance Test Procedure Revision 1.0 42A9.3 S3 Interoperability Back Panel Split Front /Back Panel Front Panel Port ID

High Speed System Compliance Test Procedure Revision 1.0 43Appendix B – Certification Guidelines B1 Submission Guidelines: System and motherboard

High Speed System Compliance Test Procedure Revision 1.0 44Example 2: Vendor A uses the same motherboard design in 3 different PC system models. T

High Speed System Compliance Test Procedure Revision 1.0 45B3.1 System For a system submission, please document the physical port location of each

High Speed System Compliance Test Procedure Revision 1.0 46Appendix C – Legacy Free Testing Remote desktop testing of Legacy Free High-speed USB sy

High Speed System Compliance Test Procedure Revision 1.0 47 3. For more information on how to setup this type of connection refer to Microsoft XP P

High Speed System Compliance Test Procedure Revision 1.0 48CAUTION: Do not shut down the Remote Desktop Connection without first exiting the High-s

High Speed System Compliance Test Procedure Revision 1.0 51 Introduction The USB-IF High-speed System/Motherboard Compliance Test Procedure is deve

High Speed System Compliance Test Procedure Revision 1.0 6Digital Sampling Oscilloscope: • Tektronix TDS694C digital sampling oscilloscope • Tek

High Speed System Compliance Test Procedure Revision 1.0 7first be installed before performing the tests outlined in this document. Please refer to

High Speed System Compliance Test Procedure Revision 1.0 8Probe Calibration The offset errors of the differential probe will be compensated later a

High Speed System Compliance Test Procedure Revision 1.0 94.3 Special Purpose Software The following special purpose software is required. Please